CRaris is a tool to prove confluence of logically constrained term rewrite systems (LCTRSs) [KN13] written in the ARI format. The tool is based on Crisys2, Constrained Rewriting Induction SYStem (version 2), which is a proof system based on Constrained Rewriting Induction [KN14,FKN17]. To prove confluence of LCTRSs, the tool uses the following:
CRaris performs on ARIWeb.
ocaml (or later version) is necessary.crisys2.config into the same directory as the tool:
Please replace
(SMTSOLVER STDIN "xxxx") (VERBOSE on)
xxxx by a command for the SMT solver you use. For example, please write (SMTSOLVER STDIN "z3 -in") for Z3.
Run crisys2cdcc from Command Line as follows:
> ./crisys2cdcc example_2-25_sf.arior> ocamlrun ./crisys2cdcc example_2-25_sf.ari
The tool tries to prove a APR problem for starvation freedom, which is written the input file, constructing a proof tree.
The tool takes an LCTRS written in the ARI format and supports the following SMT-LIB 2.6 theories:
CoreIntsFixedSizeBitVectors
By adding :fairness, APR problems for starvation freedom are proved under process fairness.
Benchmarks can be seen in the ARI-COPS database.
1531.ari
; @author Naoki Nishida
(format LCTRS :smtlib 2.6)
(theory Ints)
(sort Loc)
(sort State)
(fun state (-> Loc Loc Bool Bool Int State))
(fun noncrit0 Loc)
(fun wait0 Loc)
(fun crit0 Loc)
(fun noncrit1 Loc)
(fun wait1 Loc)
(fun crit1 Loc)
(fun success State)
(fun error State)
(rule (state noncrit0 p1 b0 b1 x) (state wait0 p1 b01 b1 x1)
:guard (and b01 (= x1 1)) :var ((x1 Int)))
(rule (state wait0 p1 b0 b1 x) (state crit0 p1 b0 b1 x)
:guard (or (= x 0) (not b1)) :var ((x Int)))
(rule (state crit0 p1 b0 b1 x) (state noncrit0 p1 b01 b1 x)
:guard (not b01))
(rule (state p0 noncrit1 b0 b1 x) (state p0 wait1 b0 b11 x1)
:guard (and b11 (= x1 0)) :var ((x1 Int)))
(rule (state p0 wait1 b0 b1 x) (state p0 crit1 b0 b1 x)
:guard (or (= x 1) (not b0)) :var ((x Int)))
(rule (state p0 crit1 b0 b1 x) (state p0 noncrit1 b0 b11 x)
:guard (not b11))
(rule (state p0 p1 b0 b1 x) success)
(rule (state crit0 crit1 b0 b1 x) error)
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1530.ari
; @author Naoki Nishida
(format LCTRS :smtlib 2.6)
(theory FixedSizeBitVectors)
(sort Loc)
(sort State)
(fun state (-> Loc Loc Bool Bool (_ BitVec 1) State))
(fun noncrit0 Loc)
(fun wait0 Loc)
(fun crit0 Loc)
(fun noncrit1 Loc)
(fun wait1 Loc)
(fun crit1 Loc)
(fun success State)
(fun error State)
(rule (state noncrit0 p1 b0 b1 x) (state wait0 p1 b01 b1 x1)
:guard (and b01 (= x1 #b1)) :var ((x1 (_ BitVec 1))))
(rule (state wait0 p1 b0 b1 x) (state crit0 p1 b0 b1 x)
:guard (or (= x #b0) (not b1)) :var ((x (_ BitVec 1))))
(rule (state crit0 p1 b0 b1 x) (state noncrit0 p1 b01 b1 x)
:guard (not b01))
(rule (state p0 noncrit1 b0 b1 x) (state p0 wait1 b0 b11 x1)
:guard (and b11 (= x1 #b0)) :var ((x1 (_ BitVec 1))))
(rule (state p0 wait1 b0 b1 x) (state p0 crit1 b0 b1 x)
:guard (or (= x #b1) (not b0)) :var ((x (_ BitVec 1))))
(rule (state p0 crit1 b0 b1 x) (state p0 noncrit1 b0 b11 x)
:guard (not b11))
(rule (state p0 p1 b0 b1 x) success)
(rule (state crit0 crit1 b0 b1 x) error)
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nishida [at] i.nagoya-u.ac.jp